What is Floor Planning?
      Floor planning is the Process of placing blocks/macros in the chip/core area, there by determining the routing areas between them.

What Floorplan Determines?

•  Size of die.
• Creates wire tracks for placement of standard cells.
• Creates power/ground (PG) connections.
•  Determines the i/o pin/pad placement.

How we will decide the good floorplan?
      A good floorplan should meet the following constraints.

• Minimize the total chip area
• Make routing phase easy (routable)
• Improve the performance by reducing signal delays

Floor Planning Guide lines:   

• Checking of net connection from macro to macro and macro and macro to standard
  cells. i.e., checking fly lines.and even we can take the reference of data flow diagram.
• Talking macros should be nearer.
• Macros should be placed near the core boundaries.
•  More connections of macro to standard cells. Spread macros inside the core area.
• Avoid Criss cross placement of macros in order to save routing resources as well as
  from routing, placement and congestion issues.
• Spacing is required between macros to avoid congestion around macros
• Leave a halo of space between macros on all sides.
• We should add an appropriate blockage. Either Soft, Partial or Hard blockages as per
  requirement.
• Create core to die blockages where i/o ports are not placed